The inventive concepts relates to a stacked semiconductor package, and more particularly, to a semiconductor package in which an upper chip is stacked on a lower chip using a through-silicon via.
As electronic devices become more miniaturized, lighter, and provide increased multi-functional capabilities—in line with the rapid development of the electronics industry and user need, a system on chip implementing a variety of functions in a single semiconductor chip, and a stacked semiconductor package including a plurality of stacked semiconductor chips in a single semiconductor package, are being developed. Also, a semiconductor package in which the system on chip and a different semiconductor chip (e.g., a memory semiconductor chip) are vertically stacked is being developed.
However, all characteristics of semiconductor chips have to be considered to implement a stacked semiconductor package where different types of semiconductor chips are stacked. That is, there may be some limitations in designing a lower semiconductor chip depending on the characteristics of an upper semiconductor chip stacked on the lower semiconductor chip.